Pro-physik

24 October 2024: Achieving precise phase control in optical applications with digital phase ...

In sensitive optical applications, obtaining the most precise measurements often involves stabilizing the laser with an external reference. One way to synchronize the phase of a signal is by using a ...
EDN

Low Power Phase-Locked Loop with VCO

The 74HC/HCT4046A are phase-locked loop (PLL) with linear voltage-controlled oscillator (VCO) CMOS device having pins suited to 4046 in a 4000B series. These devices comply to JEDEC standard no. 7A.
Electronic Design

All digital phase-locked loop offers sub-mW power consumption

San Francisco, CA. At the 2017 International Solid-State Circuits Conference in San Francisco, imec, Holst Centre, and ROHM presented an all-digital phase-locked loop (ADPLL) for Internet-of-Things ...
Design-Reuse

5 GHz 250 fs jitter Phase Locked Loop (PLL) IP Block GlobalFoundries 22nm

The PLL5G250F is an ultra-low power phase locked loop (PLL) intellectual property (IP) block. The PLL5G250F features a very small area footprint, w ...
Design-Reuse

TSMC PLL _ Clock Generator / Clock Synthesizer / Phase-Locked Loop, (Fractional / Integer)

The ARKCHIPS PLL is a versatile and stable general-purpose frequency synthesizer with phase synchronization(de-skew) Phase-Locked Loop (PLL) : feedb ...