GitHub

Ape3Diana/Washing-Machine-VHDL

This project implements a finite state machine (automaton) for controlling a washing machine, designed using digital logic principles (Control Unit/Execution Unit decomposition). The controller ...
Semiconductor Engineering

Customizing An LLM Tailored Specifically For VHDL Code And Design Of High Performance Processors (IBM)

A new technical paper titled “Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors” was published by researchers at IBM. “The use of Large Language Models (LLMs) in ...
IEEE

VHDL code generation for FPGA implementation of digital control with co-simulation step

Abstract: The principle of an automatic VHDL code generator dedicated to the control of the electric systems is presented in this paper. From the definition of classic regulator, it is possible to ...
TechRepublic

Design and Verification of VHDL Code for FPGA Based Slave VME Interface Logic

Versa Module Europa (VME) bus is used in various applications in order to ensure safety and security. VME64x based Real Time Computer (RTC) system with various types of Input /Output (I/O) hardware ...
IEEE

Application of Flowcharts in Simulink for VHDL Code Generation

This chapter presents the application of flowcharts in Simulink for generating VHDL code using HDL Coder, demonstrating its utility in digital system design. Various designs, including a multiplier, ...