Ultra Accelerator Link (UA Link) standard has been specified to enable the creation of systems comprised of multiple nodes targeting AI applications. The UA Link Protocol and interfaces are defined to ...
Two core products, the 10 Gigabit Physical Coding Sublayer (PCS) and the Media Access Controller (MAC), are intended for use in Xilinx’s Virtex-II and Virtex-II Pro field programmable gate arrays ...
SmartDV’s Ethernet 25G PCS (Physical Coding Sublayer) IP Core provides a reliable, high-speed data path between the MAC and the PMA/PHY layers for 25 ...
Synopsys has released the first 1.6T Ethernet IP verification solution to meet the bandwidth demands of hyperscale data centers. The new multi-channel, multi-rate solutions include 1.6T MAC (Media ...
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