The critical component in all digital communications receivers is the analog-to-digital converter (ADC). The ADC sampling rate, bandwidth, and noise tolerance establishes the specifications and ...

Driving an analog-to-digital converter (ADC) for optimum mixed-signal performance is a design challenge. Figure 1 shows a standard ADC driver circuit. During ADC acquisition time, the sampling ...

図1 これはモノリシック12ビットADCのFFTで、第3高調波がSFDRに影響する支配的な要素であることがわかります。この場合は搬送波電力が基準になり、基本周波数 (－1dBFS)から第3高調波 (－82dBFS)までのダイナミック・レンジは－81dBcです ...

In this paper, we describe the effects of timing and gain mismatches on the sampled signal in the general case of M-channel time-interleaved analog-to-digital converters (TI-ADCs) and propose a ...

SFDRを制限する可能性のあるADCアーキテクチャにはどのようなものがありますか? 1GSPS以上までサンプリングを行ういくつかのADCは、十分な高速データレートを実現するために、2つ以上の個別のチャンネルまたはコアを持つインターリービング方式を採用して ...

Wolfson Microelectronics has a high input voltage ADC with an extended clocking scheme, to interface to a wider range of host processors. An ADC sampling frequency of up to 192kHz allows for a greater ...

When using an active front-end amplifier to drive a high-speed converter, designing an anti-aliasing filter (AAF) can be a difficult task. It’s important to get it right because anti-aliasing is the ...

Analog Devices (ADI) has introduced a radio frequency (RF) analogue-to-digital converter (ADC) that delivers improved levels of speed and bandwidth. The AD9213 features higher parametric performance, ...

Precision signal chain designers are challenged to meet noise performance demands in medium bandwidth applications and often end up making a trade-off between noise performance and accuracy. Achieving ...

Have you ever checked how many entries are in the web for “design buffer for an ADC”? It can be hard to find what you are looking for amongmore than 4 million references. Probably not a big surprise ...